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KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
INTRODUCTION
The KS0076B is a dot matrix LCD driver & controller LSl which is fabricated by low power CMOS technology.
80 QFP
FUNCTION
* Character type dot matrix LCD driver & controller * Internal driver: 16 common and 40 segment signal output. * Display character format; 5 x 7 dot + cursor, 5 x 10 dots + cursor * Easy Interface with a 4-bit or 8-bit MPU * Display character pattern: 5 x 7 dots format: 192 kinds, 5 x 10 dots format: 32 kinds * The special character pattern can be programmable by character generator RAM directly. * A customer character pattern can be programmable by mask option.(KS0076B-00 : Standard type) * Automatic power on reset function. * It can drive a maximum 80 characters by using the KS0065B or KS0063 externally. * It is possible to read both Character Generator and Display Data RAM from MPU.
FEATURES
* Wave form: M signal B type * Internal Memory - Character Generator ROM: 8320bits - Character Generator RAM: 512 bits - Display Data RAM: 80 x 8bits for 80 digits. * Power supply Voltage; +5V 10% * Supply voltage for display : 0V(V5) * CMOS process * 1/8 duty, 1/11 duty or 1/16 duty: selectable (1/8 duty; 5x7 dots format 1 line, 1/11 duty; 5x10 dots format 1 line, 1/16 duty: 5x7 dots format 2 line) * 80 QFP or bare chip available .
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
BLOCK DIAGRAM
Power supply for LCD Drive V1 V2 V3 V4 V5 5 5 Parallel/serial Data conversion Circuit
Busy Flag
Charater Generator ROM ( CG ROM ) 8320 bits
Character Generator RAM ( CG RAM ) 512 bits 8
Cursor Blink Control Circuit
DB0 ~ DB3 Data DB4 ~ DB 7 Input Output Buffer R/W RS 8 E Instruction Register ( IR ) 7 Address Counter ( AC ) 8 Instruction Decoder ( ID ) D 7 8 Register ( DR ) 7 Display Data RAM ( DD RAM ) 808 bits 8 segment 40 - bit Shift Register 40 40 - bit Latch Circuit 40 Segment Signal Driver signal 40 ( S - S ) 1 40
7
16 - bit Shift Register
16
Common Signal Driver
16
common signal ( C 1 - C16 )
OSC 1 OSC 2
Timing Generation Circuit
CLK1 CLK2 M
VDD GND
Fig. 1. KS0076B functional block diagram.
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN CONFIGURATION
DB7 DB6 DB5 DB4 DB3 DB2 40 DB1 39 DB0 38 E 37 R/W 36 RS 35 D 34 M 33 VDD 32 CLK2 31 CLK1 30 V5 29 V4 28 V3 27 V2 26 V1 25 OSC2 1 S22 2 S21 3 S20 4 S19 5 S18 6 S17 7 S16 8 S15 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 GND OSC1 C16 C15 C14 C13 C12 C11 C10 S39 S40 C9 C8 C7 C6 C5 C4 C3 C2 C1
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 S38 65 S37 66 S36 67 S35 68 S34 69 S33 70 S32 71 S31 72 S30 73 S29 74 S28 75 S27 76 S26 77 S25 78 S24 79 S23 80
KS0076B
Fig. 2. 80 QFP Top View
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
PIN DESCRIPTION
PIN (NO) VDD(33) VSS(GND) (23) V1-V5 (26-30) S1-S40 (22-1, 80-63) C1-C16 (47-62) OSC1, OSC2 (24, 25) INPUT/OUTPUT Power Output Output Intput (OSC1) Output (OSC2) NAME DESCRIPTION Operating Voltage for logical circuit (5V10%) 0V (GND) Supply Voltage Bias voltage level fro LCD driving Segment output Segment signal output for LCD driving Common output Oscillator Common signal output for LCD driving Both pin connected to Rf resistor or ceramic resonator for internal oscillator circuit. In case of external frequency use only, the frequency is input to OSC1 terminal. Clock output terminal for the serially transfered data to be latched to the driver. Clock output terminal used when D terminal data output shifts the inside of the driver. The alternating signal to convert LCD drive waveform to AC Character pattern data, which is corresponding to each common signal, is supplied to driver serially. High Low E (38) R/W (37) Intput Enable Read/Write Selection Non selection MPU INTERFACE Power supply LCD LCD Resistor or Ceramic Resonator
CLK1 (31) CLK2 (32) M (34)
Output
Data latch Cock Data shift clock Alternated signal for LCD driver output Display data interface
KS0065B or KS0063
D (35)
Start enable signal to read or write the data R/W signal input is used to select the read/write mode High Low Read mode Write Mode
RS (36)
Register select
Register selection input High Low Data register (for read and write) Instruction register (for write), Busy flag, address counter (for read)
MPU
DB0-DB7 (39-46)
Input / Output
Data interface
Used for data transfer between the MPU and KS0076B. These terminals are for data bus with bidirectional three-state. Initial 4 bit (DB0-DB3) are not used during 4-bit operation (DB7 can be used as a busy flag)
MPU
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Internal logic of input/output terminal
Input/output Input No Pull up Logic diagram
VDD
Applicable pin E
with pull up
VDD
VDD
RS, R/W
Output
VDD
CLK1, CLK2 M,D
Input Output
VDD
VDD
DB0 - DB 7
VDD
Enable
Data
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
MAXIMUM ABSOLUTE LIMIT (Ta=25C)
Characteristic Symbol Value VDD Operating Voltage -0.3~+7.0 Driver Supply Voltage VLCD -0.3~VDD+0.3 Input Voltage VIN -0.3 ~ VDD +0.3 Power Dissipation PD 500 Operating Temperature T OPR -20~+75 Storage Temperature -55~+125 T STG * Voltage greater than above may damage to the circuit (V V1V2V3V4V5) DD Unit V V V mW C C
ELECTRICAL CHARACTERISTICS
DC Characteristics(VDD= +5V10%, VSS=0V, Ta=-20C ~+75C) Characteristic Operating Voltage OperatingCurrent(*1) Symbo l VDD IDD1 IDD2 Test condition Min Typ 0.55 0.35 Max 5.5 0.8 0.6 Unit V mA Applicable Pin
Input Voltage 1
VIH1 VIL1 Input Voltage 2 VIH2 VIL2 Output Voltage 1 VOH1 VOL1 Output Voltage 2 VOH2 VOL2 Voltage Drop (*2) VdCOM VdSEG Input Leakage Current ILKG Input Low Current IIL Frequency(*3) fEC External Clock Duty duty Rise Time tR Fall Time tF Internal Clock Frequency(*3) fOSC1 Ceramic Resinator Oscillation fOSC2 Frquency(*3) LCD Driving Voltage(*4) VLCD1 VDD-V5 VLCD2
High Low High Low High Low High Low COM SEG
4.5 Ceramic resonator fosc=250KHz Resistor oscilation external clock operation fosc=270KHz 2.2 -0.3 VDD-1.0 -0.2 IOH=-0.205mA 2.4 IOL=1.2mA 0.9VDD IO=-40A IO=40A IO=0.1mA VIN=0 or VDD -1 VDD=5V (test pull up R) -50 125 45 190 Rf=91K2% 245 1/5 bias 1/4 bias 4.6 3.0
-125 250 50 270 250 -
VDD 0.6 VDD 1.0 0.4 0.1VDD 1 1 1 -250 350 55 0.2 0.2 350 255 VDD VDD
E, OB0-DB7, R/W, RS OSC1 DB0-DB7 V CLK1, CLK2, M D C1-C16 S1-S40 E RS,R/W,DB0-DB7 OSC1
A KHz % s s KHz
OSC1, OSC2
V
V1 ~ V5
Note: *1) Applies to the current value flown in terminal VDD when power is input as follows; VDD=5V, GND=0V, V1 = 3.75V, V2 = 2.5V, V3 = 2.5V, V4 = 1.25V and V5 = 0V. *2) Applied to the voltage drop occuring from terminals VDD, V1, V4 and V5 to each common terminal (C1-C16) when 0.1mA is flown in or out to and from all COM and SEG terminals, and also to voltage drop occuring from terminals VDD, V2, V3 and V5 to each SEG terminal S1-S40. When the output level is at V , V1 or V2 level, DD 0.1 mA is flown out, while 0.1 mA flow in when the output level is at V3, V4, or V5 level. This occurs when 5V is input to VDD, V1 and V3 or to V2, V4, and V5 respectively.
KS0076B
*3) Oscillator circuit
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
Resistor circuit
External clock cirucit
*4) Input the voltage listed in the table below to V1-V5 1/8, 1/11 1/4 V1 VDD - VLCD/4 V2 VDD - VLCD/2 V3 VDD - VLCD/2 V4 VDD - 3VLCD/4 V5 VDD - VLCD *VLCD is the LCD driving voltage, refer to the initial set of the instruction code. Power Duty Bias 1/16 1/5 VDD - VLCD/5 VDD - 2VLCD/5 VDD - 3VLCD/5 VDD - 4VLCD/5 VDD - VLCD
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
AC Characteristics(VDD=5V10%, VSS=0V Ta=-20 ~ +75C) (1) Write mode (Writing data from Micom to KS0076B)
Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width ( High, Low) R/W And RS Set-Up Time R/W And RS Hold Time Data Set-Up Time Data Hold Time Symbol tc tR tF tw tSU1 tH tSU2 tH2 Min 500 220 40 10 60 10 Typ Max 25 25 Unit ns ns ns ns ns ns ns ns Test pin E E E E R/W, RS R/W, RS DB0 ~ DB7 DB0 ~ DB7
RS
VIH1 VIL1 tSU1
VIH1 VIL1 tH1
R/W VIL1 tw VIH1 VIL1 VIH1 VIL1 tSU2 tR DB0 - DB7 VIH1 VIL1 Valid Data tc
(2) Read mode (Reading data from KS0076B to Micom) Characteristic E Cycle Time E Rise Time E Fall Time E Pulse Width ( High, Low) R/W And RS Set-Up Time R/W And RS Hold Time Data Output Delay Time Data Hold Time Symbol tc tR tF tw tSU tH tD tDH Min 500 220 40 10 20 Typ Max 25 25 120 Unit ns ns ns ns ns ns ns ns Test pin E E E E R/W, RS R/W, RS DB0 ~ DB7 DB0 ~ DB7
VIL1 tH1
E
VIL1 tF tH2
VIH1 VIL1
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
RS
V IH1 V IL1 tSU
V IH1 V IL1 tH
R/W
V IL1 tw tF tH
V IH1 E V IL1 tR tD D B0 - D B7 V IH1 V IL1 tDH V IH1 V IL1 V IL1 V IL1
Valid Data tc
(3) Interface mode with KS0065B, KS0063 Characteristic Clock Pulse Width High Clock Pluse Width Low Data Set-Up Time Data Hold Time Clock Set-Up Time M Delay Time Symbol tWCKH tWCKL tSU tDH tCSU tDM
0.9VDD CLK1
Min 800 800 300 300 500 -1000
Typ -
Max 1000
Unit ns ns ns ns ns ns
Test pin CLK CLK D D CLK M
0.9VDD
tW C K H tC S U CLK2 0.1VDD tC S U 0.9VDD
tW C K H 0.9VDD 0.1VDD tW C K L 0.1VDD
D
0.9VDD 0.1VDD tS U
0.9VDD 0.1VDD tD H
M
0.9VDD
tD M
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CONTROL and DISPLAY COMMAND
Command DISPLAY CLEAR RETURN HOME ENTRY MODE SET RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 L L L L L L L L L L L L L L L L L L L L L L L H L H I/D H X SH Excution Remark time (fosc=250KHz) 1.64ms 1.64ms cursor move to first digit 40s *I/D; set cursor move direction H Increase I/D Decrease L *SH: Specifies shift of display display is shifted H SH L DISPLAY ON/OFF L L L L L L H D C B 40s *Display D *Cursor H C L *Blinking B H L Blinking on Blinking off Cursor on Cursor off H L Display on Display off display is not shifted
SHIFT
L
L
L
L
L
H
S/C R/L
X
X
40s SC R/L
H L H L
Display shift Cursor move Right shift Left shift 8 bits interface 4 bits interface 2 line display 1 line display 5x10 dots 5x7 dots
SET FUNCTION
L
L
L
L
H
DL
N
F
X
X
40s DL H L H L H L
N
F
Table 1.
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
CONTROL and DISPLAY COMMAND (continued)
Command SET CG RAM ADDRESS SET DD RAM ADDRESS READ BUSY FLAG & ADDRESS RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 L L L L L H L H BF H Excution Remark time (fosc=250KHz) CG RAM Data is sent and CG RAM address 40s received after this setting (corresponds to cursor address) DD RAM Data is sent and DD RAM address 40s recevied after this setting Address Counter used for 0s Busy Both DD & CG RAM address BF H Ready L - Reads BF indication internal operating is being performed. - reads address counter contents Write data into DD or CGRAM Read data from DD or CGRAM
WRITE DATA READ DATA X: don't care
H H
L H Table 1
Read Data Write Data
46s 46s
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
APPLICATION INFORMATION ACCORDING TO LCD PANEL
1) LCD Panel:8 characterx1 line character format;5x7 dots + 1 cursor line(1/4 bias, 1/8 duty)
C8 S1
KS0076B
S 40
2) LCD Panel: 8 characterx1 line character format; 5x10 dots + 1 cursor line (1/4 bias, 1/11 duty)
C1
C11 KS0076B S1
S40
~ ~~~~~~~
C1
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
3) LCD Panel : 8 character x 2 line character format; 5 x 7 dots + 1 cursor line (1/5 bias, 1/16 duty)
C1
C8 C9
KS0076B
C 16
S1
S 40
4) LCD Panel : 16 character x 1 line Character format;5x7 dots + 1 cursor line (1/5 bias, 1/16 duty)
C1
C8
KS0076B
S1
S40 C9
C16
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
5) LCD Panel : 4character x 2 line character ; 5x 7 dots + 1 cursor line (1/4 bias, 1/8 duty)
S1
S 20
C1
C8 KS0076B
S 21
S 40
BIAS VOLTAGE DIVIDE CIRCUIT
KS0076B KS0066
VDD VDD ( +5V ) V1 V2 V3 V4 V5 VDD VDD ( + 5V )
KS0076B KS0066
V1 V2 V3 V4 V5
R
R
R
R
R
R
R
R
R
GND
( 1/4 bias, 1/8 or 1/11 duty ) -5V or GND ( 1/5 bias, 1/16 duty )
GND
-5V or GND
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
C1 ~ C16
LCD Panel
S 1 ~ S 80 DL2 DR1 KS0065B
SC1 ~ SC40
SC1 ~ SC40 DL2 DR1 KS0065B DL1 DR2 FCS CL1 SHL1 CL2 SHL2 M VSS VDD V6 V5 V4 V3 V2 V1 VEE
SC1 ~ SC40 DL2 DR1 DL1 DR2 FCS CL1 SHL1 CL2 SHL2 M VSS VDD V6 V5 V4 V3 V2 V1 VEE KS0065B
D OSC1
OSC2
DL1 DR2 FCS CL1 SHL1 CL2 SHL2 M VSS VDD V6 V5 V4 V3 V2 V1 VEE
KS0076B
VSS M CLK1 CLK2 VDD V1 V2 V2 V3 V4 DB0 ~ DB7 V5 V3 V4 V5 VLCD ( 1/5 bias ) V1
VDD
APPLICATION CIRCUIT
KS0076B
GND
When KS0065B is externally connected to the KS0076B, you can increase the number of display digits up to 80 characters. To MPU
KS0076B
PAD DIAGRAM
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
KS0076B
1 2 3 4 5 6 7 8 9
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62 61 60 59 58
57 56 55
Y
10 11 12 13 14 15 16 17 18 19 20 21 22 46 45 44 43 42 41 54 53
(0,0)
X
52 51
CHIP SIZE : 3630 4450 PAD SIZE : 100 100 UNIT : i m
50 49 48 47
23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
* "KS0076B" Marking : easy to find the PAD No.1
KS0076B
16COM/40SEG DRIVER & CONTROLLER FOR DOT MATRIX LCD
UNIT (m) COORDINATE X -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1630 -1401.5 -1217.5 -1041.5 -857.5 Y 1816.5 1676.5 1536.5 1396.5 1256.5 1116.5 976.5 836.5 696.5 556.5 416.5 276.5 136.5 -3.5 -143.5 -283.5 -423.5 -563.5 -703.5 -843.5 -983.5 -1123.5 -1722.5 -1911.5 -1911.5 -1911.5 -1911.5 PAD PAD PAD PAD COORDINATE Y X NUMBER NAME 55 -673.5 -1911.5 C9 -489.5 -305.5 -121.5 62.5 240.5 409.5 593.5 777.5 961.5 1145.5 1329.5 1513.5 1501.5 1501.5 1501.5 1501.5 1501.5 1501.5 1630 1630 1630 1630 1630 1630 1630 1630 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1911.5 -1573 -1389 -1205 -1021 -837 -653 -452 -312 -172 -32 108 248 388 528 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 C10 C11 C12 C13 C14 C15 C16 S40 S39 S38 S37 S36 S35 S34 S33 S32 S31 S30 S29 S28 S27 S26 S25 S24 S23 COORDINATE Y X 717.5 1630 1630 1630 1630 1630 1630 1630 1630 1630 1104.5 964.5 824.5 684.5 544.5 404.5 264.5 124.5 -15.5 -155.5 -295.5 -435.5 -575.5 -715.5 -855.5 -995.5 -1135.5 857.5 997.5 1166 1306 1446 1586 1276 1918 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040 2040
PAD LOCATION PAD
NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 PAD NAME S22 S21 S20 S19 S18 S17 S16 S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 GND OSC1 OSC2 V1 V2 NUMBER NAME V3 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 V4 V5 CLK1 CLK2 VDD M D RS R/W E DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 C1 C2 C3 C4 C5 C6 C7 C8
Standard Character Pattern (KS0076B-00)

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